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1. general description the 74LVC2G74 is a high-performance, low-voltage, si-gate cmos device, superior to most advanced cmos compatible ttl families. the 74LVC2G74 is a single positive edge triggered d-type ?ip-?op with individual data (d) inputs, clock (cp) inputs, set ( sd) and ( rd) inputs, and complementary q and q outputs. this device is fully speci?ed for partial power down applications using i off . the i off circuitry disables the output, preventing damaging back?ow current through the device when it is powered down. the set and reset are asynchronous active low inputs and operate independently of the clock input. information on the data input is transferred to the q output on the low-to-high transition of the clock pulse. the d inputs must be stable, one set-up time prior to the low-to-high clock transition for predictable operation. schmitt-trigger action at all inputs makes the circuit highly tolerant to slower input rise and fall times. 2. features n wide supply voltage range from 1.65 v to 5.5 v n 5 v tolerant inputs for interfacing with 5 v logic n high noise immunity n complies with jedec standard: u jesd8-7 (1.65 v to 1.95 v) u jesd8-5 (2.3 v to 2.7 v) u jesd8-b/jesd36 (2.7 v to 3.6 v) n 24 ma output drive (v cc = 3.0 v) n esd protection: u hbm eia/jesd22-a114-c exceeds 2000 v u mm eia/jesd22-a115-a exceeds 200 v n cmos low power consumption n latch-up performance exceeds 250 ma n direct interface with ttl levels n inputs accept voltages up to 5 v n multiple package options n speci?ed from - 40 cto+85 c and - 40 c to +125 c 74LVC2G74 single d-type ?ip-?op with set and reset; positive edge trigger rev. 01 3 november 2005 product data sheet
74LVC2G74_1 ? koninklijke philips electronics n.v. 2005. all rights reserved. product data sheet rev. 01 3 november 2005 2 of 20 philips semiconductors 74LVC2G74 single d-type ?ip-?op with set and reset; positive edge trigger 3. quick reference data [1] c pd is used to determine the dynamic power dissipation (p d in m w). p d =c pd v cc 2 f i n+ s (c l v cc 2 f o ) where: f i = input frequency in mhz; f o = output frequency in mhz; c l = output load capacitance in pf; v cc = supply voltage in v; n = number of inputs switching; s (c l v cc 2 f o ) = sum of the outputs. [2] the condition is v i = gnd to v cc . 4. ordering information 5. marking table 1: quick reference data gnd = 0 v; t amb =25 c; t r =t f 2.5 ns. symbol parameter conditions min typ max unit t phl , t plh propagation delay cp to q, qc l = 50 pf; v cc = 3.3 v - 3.5 - ns sd to q, qc l = 50 pf; v cc = 3.3 v - 3.0 - ns rd to q, qc l = 50 pf; v cc = 3.3 v - 3.0 - ns f max maximum input clock frequency c l = 50 pf; v cc = 3.3 v - 280 - mhz c i input capacitance - 4.0 - pf c pd power dissipation capacitance v cc = 3.3 v [1] [2] -15-pf table 2: ordering information type number package temperature range name description version 74LVC2G74dp - 40 c to +125 c tssop8 plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm sot505-2 74LVC2G74dc - 40 c to +125 c vssop8 plastic very thin shrink small outline package; 8 leads; body width 2.3 mm sot765-1 74LVC2G74gt - 40 c to +125 c xson8 plastic extremely thin small outline package; no leads; 8 terminals; body 1 1.95 0.5 mm sot833-1 table 3: marking type number marking code 74LVC2G74dp v74 74LVC2G74dc v74 74LVC2G74gt v74
74LVC2G74_1 ? koninklijke philips electronics n.v. 2005. all rights reserved. product data sheet rev. 01 3 november 2005 3 of 20 philips semiconductors 74LVC2G74 single d-type ?ip-?op with set and reset; positive edge trigger 6. functional diagram fig 1. logic symbol fig 2. iec logic symbol mnb139 rd ff sd 7 q q q 5 2 1 3 q sd cp cp d d 6 rd mnb140 3 1 2 c1 7 s 1d 6 r 5 fig 3. logic diagram mna421 sd cp rd d c c q c c c c c c q c c
74LVC2G74_1 ? koninklijke philips electronics n.v. 2005. all rights reserved. product data sheet rev. 01 3 november 2005 4 of 20 philips semiconductors 74LVC2G74 single d-type ?ip-?op with set and reset; positive edge trigger 7. pinning information 7.1 pinning 7.2 pin description 8. functional description 8.1 function table [1] h = high voltage level; l = low voltage level; x = dont care. fig 4. pin con?guration tssop8 and vssop8 fig 5. pin con?guration xson8 74 cp v cc dsd qrd gnd q 001aab659 1 2 3 4 6 5 8 7 74 rd sd v cc q q d cp gnd 001aab658 36 27 18 45 transparent top view table 4: pin description symbol pin description cp 1 clock input (low-to-high, edge-triggered) d 2 data input q 3 complement ?ip-?op output gnd 4 ground (0 v) q 5 true ?ip-?op output rd 6 asynchronous reset-direct input (active low) sd 7 asynchronous set-direct input (active low) v cc 8 supply voltage table 5: function table for asynchronous operation [1] input output sd rd cp d q q lhxxhl hl xxl h llxxhh
74LVC2G74_1 ? koninklijke philips electronics n.v. 2005. all rights reserved. product data sheet rev. 01 3 november 2005 5 of 20 philips semiconductors 74LVC2G74 single d-type ?ip-?op with set and reset; positive edge trigger [1] h = high voltage level; l = low voltage level; x = dont care; - = low-to-high cp transition; q n+1 = state after the next low-to-high cp transition. 9. limiting values [1] the input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] when v cc = 0 v (power-down mode), the output voltage can be 5.5 v in normal operation. 10. recommended operating conditions table 6: function table for synchronous operation [1] input output sd rd cp d q n+1 q n+1 hh - llh hh - hhl table 7: limiting values in accordance with the absolute maximum rating system (iec 60134). voltages are referenced to gnd (ground = 0 v). symbol parameter conditions min max unit v cc supply voltage - 0.5 +6.5 v i ik input clamping current v i <0v - - 50 ma v i input voltage [1] - 0.5 +6.5 v i ok output clamping current v o >v cc or v o <0v - 50 ma v o output voltage active mode [1] [2] - 0.5 v cc + 0.5 v power-down mode [1] [2] - 0.5 +6.5 v i o output current v o =0 vtov cc - 50 ma i cc quiescent supply current - 100 ma i gnd ground current - 100 ma t stg storage temperature - 65 +150 c p tot total power dissipation t amb = - 40 c to +125 c - 250 mw table 8: recommended operating conditions symbol parameter conditions min typ max unit v cc supply voltage 1.65 - 5.5 v v i input voltage 0 - 5.5 v v o output voltage active mode 0 - v cc v power-down mode; v cc =0v 0 - 5.5 v t amb ambient temperature - 40 - +125 c d t /d v input transition rise and fall rate v cc = 1.65 v to 2.7 v 0 - 20 ns/v v cc = 2.7 v to 5.5 v 0 - 10 ns/v
74LVC2G74_1 ? koninklijke philips electronics n.v. 2005. all rights reserved. product data sheet rev. 01 3 november 2005 6 of 20 philips semiconductors 74LVC2G74 single d-type ?ip-?op with set and reset; positive edge trigger 11. static characteristics table 9: static characteristics at recommended operating conditions; voltages are referenced to gnd (ground = 0 v). symbol parameter conditions min typ max unit t amb = - 40 c to +85 c [1] v ih high-state input voltage v cc = 1.65 v to 1.95 v 0.65 v cc -- v v cc = 2.3 v to 2.7 v 1.7 - - v v cc = 2.7 v to 3.6 v 2.0 - - v v cc = 4.5 v to 5.5 v 0.7 v cc -- v v il low-state input voltage v cc = 1.65 v to 1.95 v - - 0.35 v cc v v cc = 2.3 v to 2.7 v - - 0.7 v v cc = 2.7 v to 3.6 v - - 0.8 v v cc = 4.5 v to 5.5 v - - 0.3 v cc v v oh high-state output voltage v i = v ih or v il i o = - 100 m a; v cc = 1.65 v to 5.5 v v cc - 0.1 - - v i o = - 4 ma; v cc = 1.65 v 1.2 1.54 - v i o = - 8 ma; v cc = 2.3 v 1.9 2.15 - v i o = - 12 ma; v cc = 2.7 v 2.2 2.50 - v i o = - 24 ma; v cc = 3.0 v 2.3 2.62 - v i o = - 32 ma; v cc = 4.5 v 3.8 4.11 - v v ol low-state output voltage v i = v ih or v il i o = 100 m a; v cc = 1.65 v to 5.5 v - - 0.10 v i o = 4 ma; v cc = 1.65 v - 0.07 0.45 v i o = 8 ma; v cc = 2.3 v - 0.12 0.30 v i o = 12 ma; v cc = 2.7 v - 0.17 0.40 v i o = 24 ma; v cc = 3.0 v - 0.33 0.55 v i o = 32 ma; v cc = 4.5 v - 0.39 0.55 v i li input leakage current v i = 5.5 v or gnd; v cc = 5.5 v - 0.1 5 m a i off power-off leakage current v i or v o = 5.5 v; v cc = 0 v - 0.1 10 m a i cc quiescent supply current v i = v cc or gnd; i o = 0 a; v cc = 5.5 v - 0.1 10 m a d i cc additional quiescent supply current (per pin) v i = v cc - 0.6 v; i o = 0 a; v cc = 2.3 v to 5.5 v - 5 500 m a c i input capacitance - 4.0 - pf
74LVC2G74_1 ? koninklijke philips electronics n.v. 2005. all rights reserved. product data sheet rev. 01 3 november 2005 7 of 20 philips semiconductors 74LVC2G74 single d-type ?ip-?op with set and reset; positive edge trigger [1] all typical values are measured at t amb = 25 c. t amb = - 40 c to +125 c v ih high-state input voltage v cc = 1.65 v to 1.95 v 0.65 v cc -- v v cc = 2.3 v to 2.7 v 1.7 - - v v cc = 2.7 v to 3.6 v 2.0 - - v v cc = 4.5 v to 5.5 v 0.7 v cc -- v v il low-state input voltage v cc = 1.65 v to 1.95 v - - 0.35 v cc v v cc = 2.3 v to 2.7 v - - 0.7 v v cc = 2.7 v to 3.6 v - - 0.8 v v cc = 4.5 v to 5.5 v - - 0.3 v cc v v oh high-state output voltage v i = v ih or v il i o = - 100 m a; v cc = 1.65 v to 5.5 v v cc - 0.1 - - v i o = - 4 ma; v cc = 1.65 v 0.95 - - v i o = - 8 ma; v cc = 2.3 v 1.7 - - v i o = - 12 ma; v cc = 2.7 v 1.9 - - v i o = - 24 ma; v cc = 3.0 v 2.0 - - v i o = - 32 ma; v cc = 4.5 v 3.4 - - v v ol low-state output voltage v i = v ih or v il i o = 100 m a; v cc = 1.65 v to 5.5 v - - 0.10 v i o = 4 ma; v cc = 1.65 v - - 0.70 v i o = 8 ma; v cc = 2.3 v - - 0.45 v i o = 12 ma; v cc = 2.7 v - - 0.60 v i o = 24 ma; v cc = 3.0 v - - 0.80 v i o = 32 ma; v cc = 4.5 v - - 0.80 v i li input leakage current v i = 5.5 v or gnd; v cc = 5.5 v - - 20 m a i off power-off leakage current v i or v o = 5.5 v; v cc = 0 v - - 20 m a i cc quiescent supply current v i = v cc or gnd; i o = 0 a; v cc = 5.5 v --40 m a d i cc additional quiescent supply current (per pin) v i = v cc - 0.6 v; i o = 0 a; v cc = 2.3 v to 5.5 v - - 5000 m a table 9: static characteristics continued at recommended operating conditions; voltages are referenced to gnd (ground = 0 v). symbol parameter conditions min typ max unit
74LVC2G74_1 ? koninklijke philips electronics n.v. 2005. all rights reserved. product data sheet rev. 01 3 november 2005 8 of 20 philips semiconductors 74LVC2G74 single d-type ?ip-?op with set and reset; positive edge trigger 12. dynamic characteristics table 10: dynamic characteristics voltages are referenced to gnd (ground = 0 v); for test circuit see figure 8 . symbol parameter conditions min typ max unit t amb = - 40 c to +85 c [1] t phl , t plh propagation delay cp to q, q see figure 6 v cc = 1.65 v to 1.95 v 1.5 6.0 13.4 ns v cc = 2.3 v to 2.7 v 1.0 3.5 7.1 ns v cc = 2.7 v 1.0 3.5 7.1 ns v cc = 3.0 v to 3.6 v 1.0 3.5 [2] 5.9 ns v cc = 4.5 v to 5.5 v 1.0 2.5 4.1 ns sd to q, q see figure 7 v cc = 1.65 v to 1.95 v 1.5 6.0 12.9 ns v cc = 2.3 v to 2.7 v 1.0 3.5 7.0 ns v cc = 2.7 v 1.0 3.5 7.0 ns v cc = 3.0 v to 3.6 v 1.0 3.0 [2] 5.9 ns v cc = 4.5 v to 5.5 v 1.0 2.5 4.1 ns rd to q, q see figure 7 v cc = 1.65 v to 1.95 v 1.5 5.0 12.9 ns v cc = 2.3 v to 2.7 v 1.0 3.5 7.0 ns v cc = 2.7 v 1.0 3.5 7.0 ns v cc = 3.0 v to 3.6 v 1.0 3.0 [2] 5.9 ns v cc = 4.5 v to 5.5 v 1.0 2.5 4.1 ns t w pulse width clock cp high or low see figure 6 v cc = 1.65 v to 1.95 v 6.2 - - ns v cc = 2.3 v to 2.7 v 2.7 - - ns v cc = 2.7 v 2.7 - - ns v cc = 3.0 v to 3.6 v 2.7 1.3 [2] -ns v cc = 4.5 v to 5.5 v 2.0 - - ns set sd (low) and reset rd (low) see figure 7 v cc = 1.65 v to 1.95 v 6.2 - - ns v cc = 2.3 v to 2.7 v 2.7 - - ns v cc = 2.7 v 2.7 - - ns v cc = 3.0 v to 3.6 v 2.7 1.6 [2] -ns v cc = 4.5 v to 5.5 v 2.0 - - ns
74LVC2G74_1 ? koninklijke philips electronics n.v. 2005. all rights reserved. product data sheet rev. 01 3 november 2005 9 of 20 philips semiconductors 74LVC2G74 single d-type ?ip-?op with set and reset; positive edge trigger t rec recovery time set sd or reset rd see figure 7 v cc = 1.65 v to 1.95 v 1.9 - - ns v cc = 2.3 v to 2.7 v 1.4 - - ns v cc = 2.7 v 1.3 - - ns v cc = 3.0 v to 3.6 v 1.2 - 3.0 [2] -ns v cc = 4.5 v to 5.5 v 1.0 - - ns t su setup time dtocp see figure 6 v cc = 1.65 v to 1.95 v 2.9 - - ns v cc = 2.3 v to 2.7 v 1.7 - - ns v cc = 2.7 v 1.7 - - ns v cc = 3.0 v to 3.6 v 1.3 0.5 [2] -ns v cc = 4.5 v to 5.5 v 1.1 - - ns t h hold time dtocp see figure 6 v cc = 1.65 v to 1.95 v 0.0 - - ns v cc = 2.3 v to 2.7 v 0.3 - - ns v cc = 2.7 v 0.5 - - ns v cc = 3.0 v to 3.6 v 1.2 0.6 [2] -ns v cc = 4.5 v to 5.5 v 0.5 - - ns f max maximum input clock frequency see figure 6 v cc = 1.65 v to 1.95 v 80 - - mhz v cc = 2.3 v to 2.7 v 175 - - mhz v cc = 2.7 v 175 - - mhz v cc = 3.0 v to 3.6 v 175 280 [2] - mhz v cc = 4.5 v to 5.5 v 200 - - mhz table 10: dynamic characteristics continued voltages are referenced to gnd (ground = 0 v); for test circuit see figure 8 . symbol parameter conditions min typ max unit
74LVC2G74_1 ? koninklijke philips electronics n.v. 2005. all rights reserved. product data sheet rev. 01 3 november 2005 10 of 20 philips semiconductors 74LVC2G74 single d-type ?ip-?op with set and reset; positive edge trigger t amb = - 40 c to +125 c t phl , t plh propagation delay cp to q, q see figure 6 v cc = 1.65 v to 1.95 v 1.5 - 13.4 ns v cc = 2.3 v to 2.7 v 1.0 - 7.1 ns v cc = 2.7 v 1.0 - 7.1 ns v cc = 3.0 v to 3.6 v 1.0 - 5.9 ns v cc = 4.5 v to 5.5 v 1.0 - 4.1 ns sd to q, q see figure 7 v cc = 1.65 v to 1.95 v 1.5 - 12.9 ns v cc = 2.3 v to 2.7 v 1.0 - 7.0 ns v cc = 2.7 v 1.0 - 7.0 ns v cc = 3.0 v to 3.6 v 1.0 - 5.9 ns v cc = 4.5 v to 5.5 v 1.0 - 4.1 ns rd to q, q see figure 7 v cc = 1.65 v to 1.95 v 1.5 - 12.9 ns v cc = 2.3 v to 2.7 v 1.0 - 7.0 ns v cc = 2.7 v 1.0 - 7.0 ns v cc = 3.0 v to 3.6 v 1.0 - 5.9 ns v cc = 4.5 v to 5.5 v 1.0 - 4.1 ns t w pulse width clock cp high or low see figure 6 v cc = 1.65 v to 1.95 v 6.2 - - ns v cc = 2.3 v to 2.7 v 2.7 - - ns v cc = 2.7 v 2.7 - - ns v cc = 3.0 v to 3.6 v 2.7 - - ns v cc = 4.5 v to 5.5 v 2.0 - - ns set sd (low) and reset rd (low) see figure 7 v cc = 1.65 v to 1.95 v 6.2 - - ns v cc = 2.3 v to 2.7 v 2.7 - - ns v cc = 2.7 v 2.7 - - ns v cc = 3.0 v to 3.6 v 2.7 - - ns v cc = 4.5 v to 5.5 v 2.0 - - ns t rec recovery time set sd or reset rd see figure 7 v cc = 1.65 v to 1.95 v 1.9 - - ns v cc = 2.3 v to 2.7 v 1.4 - - ns v cc = 2.7 v 1.3 - - ns v cc = 3.0 v to 3.6 v 1.2 - - ns v cc = 4.5 v to 5.5 v 1.0 - - ns table 10: dynamic characteristics continued voltages are referenced to gnd (ground = 0 v); for test circuit see figure 8 . symbol parameter conditions min typ max unit
74LVC2G74_1 ? koninklijke philips electronics n.v. 2005. all rights reserved. product data sheet rev. 01 3 november 2005 11 of 20 philips semiconductors 74LVC2G74 single d-type ?ip-?op with set and reset; positive edge trigger [1] all typical values are measured at t amb = 25 c. [2] these typical values are measured at v cc = 3.3 v. t su setup time dtocp see figure 6 v cc = 1.65 v to 1.95 v 2.9 - - ns v cc = 2.3 v to 2.7 v 1.7 - - ns v cc = 2.7 v 1.7 - - ns v cc = 3.0 v to 3.6 v 1.3 - - ns v cc = 4.5 v to 5.5 v 1.1 - - ns t h hold time dtocp see figure 6 v cc = 1.65 v to 1.95 v 0.0 - - ns v cc = 2.3 v to 2.7 v 0.3 - - ns v cc = 2.7 v 0.5 - - ns v cc = 3.0 v to 3.6 v 1.2 - - ns v cc = 4.5 v to 5.5 v 0.5 - - ns f max maximum input clock frequency see figure 6 v cc = 1.65 v to 1.95 v 80 - - mhz v cc = 2.3 v to 2.7 v 175 - - mhz v cc = 2.7 v 175 - - mhz v cc = 3.0 v to 3.6 v 175 - - mhz v cc = 4.5 v to 5.5 v 200 - - mhz table 10: dynamic characteristics continued voltages are referenced to gnd (ground = 0 v); for test circuit see figure 8 . symbol parameter conditions min typ max unit
74LVC2G74_1 ? koninklijke philips electronics n.v. 2005. all rights reserved. product data sheet rev. 01 3 november 2005 12 of 20 philips semiconductors 74LVC2G74 single d-type ?ip-?op with set and reset; positive edge trigger 13. waveforms measurement points are given in t ab le 11 . the shaded areas indicate when the input is permitted to change for predictable output performance. v ol and v oh are typical output voltage drop that occur with the output load. fig 6. the clock input (cp) to output (q, q) propagation delays, the clock pulse width, the d to cp set-up, the cp to d hold times and the maximum clock pulse frequency table 11: measurement points supply voltage input output v cc v m v m 1.65 v to 1.95 v 0.5 v cc 0.5 v cc 2.3 v to 2.7 v 0.5 v cc 0.5 v cc 2.7 v 1.5 v 1.5 v 3.0 v to 3.6 v 1.5 v 1.5 v 4.5 v to 5.5 v 0.5 v cc 0.5 v cc mnb141 t h t su t h t phl t phl t plh t plh t su 1/f max v m v m v m v i gnd t w v m v i gnd cp input d input v oh v ol q output v oh v ol q output
74LVC2G74_1 ? koninklijke philips electronics n.v. 2005. all rights reserved. product data sheet rev. 01 3 november 2005 13 of 20 philips semiconductors 74LVC2G74 single d-type ?ip-?op with set and reset; positive edge trigger measurement points are given in t ab le 11 . v ol and v oh are typical output voltage drop that occur with the output load. fig 7. the set ( sd) and reset ( rd) input to output (q, q) propagation delays, the set and reset pulse widths and the rd to cp removal time test data is given in t ab le 12 . de?nitions for test circuit: r l = load resistor. c l = load capacitance including jig and probe capacitance. r t = termination resistance should be equal to output impedance z o of the pulse generator. v ext = test voltage for switching times. fig 8. load circuitry for switching times mnb142 t rec t phl t phl t w t plh t plh v m v m v m t w v m v m v i gnd v i gnd sd input v i gnd rd input cp input v oh v ol q output v oh v ol q output v ext v cc v i v o mna616 dut c l r t r l r l pulse generator
74LVC2G74_1 ? koninklijke philips electronics n.v. 2005. all rights reserved. product data sheet rev. 01 3 november 2005 14 of 20 philips semiconductors 74LVC2G74 single d-type ?ip-?op with set and reset; positive edge trigger table 12: test data supply voltage input load v ext v cc v i t r = t f c l r l t plh , t phl t pzh , t phz t pzl , t plz 1.65 v to 1.95 v v cc 2.0 ns 30 pf 1 k w open gnd 2 v cc 2.3 v to 2.7 v v cc 2.0 ns 30 pf 500 w open gnd 2 v cc 2.7 v 2.7 v 2.5 ns 50 pf 500 w open gnd 6 v 3.0 v to 3.6 v 2.7 v 2.5 ns 50 pf 500 w open gnd 6 v 4.5 v to 5.5 v v cc 2.5 ns 50 pf 500 w open gnd 2 v cc
74LVC2G74_1 ? koninklijke philips electronics n.v. 2005. all rights reserved. product data sheet rev. 01 3 november 2005 15 of 20 philips semiconductors 74LVC2G74 single d-type ?ip-?op with set and reset; positive edge trigger 14. package outline fig 9. package outline sot505-2 (tssop8) unit a 1 a max. a 2 a 3 b p l h e l p wy v ce d (1) e (1) z (1) q references outline version european projection issue date iec jedec jeita mm 0.15 0.00 0.95 0.75 0.38 0.22 0.18 0.08 3.1 2.9 3.1 2.9 0.65 4.1 3.9 0.70 0.35 8 0 0.13 0.1 0.2 0.5 dimensions (mm are the original dimensions) note 1. plastic or metal protrusions of 0.15 mm maximum per side are not included. 0.47 0.33 sot505-2 - - - 02-01-16 w m b p d z e 0.25 14 8 5 q a 2 a 1 l p (a 3 ) detail x a l h e e c v m a x a y 2.5 5 mm 0 scale tssop8: plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm sot505-2 1.1 pin 1 index
74LVC2G74_1 ? koninklijke philips electronics n.v. 2005. all rights reserved. product data sheet rev. 01 3 november 2005 16 of 20 philips semiconductors 74LVC2G74 single d-type ?ip-?op with set and reset; positive edge trigger fig 10. package outline sot765-1 (vssop8) unit a 1 a max. a 2 a 3 b p l h e l p wy v ce d (1) e (2) z (1) q references outline version european projection issue date iec jedec jeita mm 0.15 0.00 0.85 0.60 0.27 0.17 0.23 0.08 2.1 1.9 2.4 2.2 0.5 3.2 3.0 0.4 0.1 8 0 0.13 0.1 0.2 0.4 dimensions (mm are the original dimensions) notes 1. plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. plastic or metal protrusions of 0.25 mm maximum per side are not included. 0.40 0.15 q 0.21 0.19 sot765-1 mo-187 02-06-07 w m b p d z e 0.12 14 8 5 q a 2 a 1 q l p (a 3 ) detail x a l h e e c v m a x a y 2.5 5 mm 0 scale vssop8: plastic very thin shrink small outline package; 8 leads; body width 2.3 mm sot765-1 1 pin 1 index
74LVC2G74_1 ? koninklijke philips electronics n.v. 2005. all rights reserved. product data sheet rev. 01 3 november 2005 17 of 20 philips semiconductors 74LVC2G74 single d-type ?ip-?op with set and reset; positive edge trigger fig 11. package outline sot833-1 (xson8) terminal 1 index area references outline version european projection issue date iec jedec jeita sot833-1 - - - mo-252 - - - sot833-1 04-07-22 04-11-09 dimensions (mm are the original dimensions) xson8: plastic extremely thin small outline package; no leads; 8 terminals; body 1 x 1.95 x 0.5 mm d e e 1 e a 1 b l l 1 e 1 e 1 0 1 2 mm scale notes 1. including plating thickness. 2. can be visible in some manufacturing processes. unit mm 0.25 0.17 2.0 1.9 0.35 0.27 a 1 max b e 1.05 0.95 d ee 1 l 0.40 0.32 l 1 0.5 0.6 a (1) max 0.5 0.04 1 8 2 7 3 6 4 5 8 (2) 4 (2) a
philips semiconductors 74LVC2G74 single d-type ?ip-?op with set and reset; positive edge trigger 74LVC2G74_1 ? koninklijke philips electronics n.v. 2005. all rights reserved. product data sheet rev. 01 3 november 2005 18 of 20 15. abbreviations 16. revision history table 13: abbreviations acronym description cmos complementary metal oxide semiconductor ttl transistor transistor logic hbm human body model esd electrostatic discharge mm machine model cdm charged device model dut device under test table 14: revision history document id release date data sheet status change notice doc. number supersedes 74LVC2G74_1 20051103 product data sheet - - -
philips semiconductors 74LVC2G74 single d-type ?ip-?op with set and reset; positive edge trigger 74LVC2G74_1 ? koninklijke philips electronics n.v. 2005. all rights reserved. product data sheet rev. 01 3 november 2005 19 of 20 17. data sheet status [1] please consult the most recently issued data sheet before initiating or completing a design. [2] the product status of the device(s) described in this data sheet may have changed since this data sheet was published. the l atest information is available on the internet at url http://www.semiconductors.philips.com. [3] for data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. 18. de?nitions short-form speci?cation the data in a short-form speci?cation is extracted from a full data sheet with the same type number and title. for detailed information see the relevant data sheet or data handbook. limiting values de?nition limiting values given are in accordance with the absolute maximum rating system (iec 60134). stress above one or more of the limiting values may cause permanent damage to the device. these are stress ratings only and operation of the device at these or at any other conditions above those given in the characteristics sections of the speci?cation is not implied. exposure to limiting values for extended periods may affect device reliability. application information applications that are described herein for any of these products are for illustrative purposes only. philips semiconductors make no representation or warranty that such applications will be suitable for the speci?ed use without further testing or modi?cation. 19. disclaimers life support these products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. philips semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify philips semiconductors for any damages resulting from such application. right to make changes philips semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. when the product is in full production (status production), relevant changes will be communicated via a customer product/process change noti?cation (cpcn). philips semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise speci?ed. 20. trademarks notice all referenced brands, product names, service names and trademarks are the property of their respective owners. 21. contact information for additional information, please visit: http://www.semiconductors.philips.com for sales of?ce addresses, send an email to: sales.addresses@www.semiconductors.philips.com level data sheet status [1] product status [2] [3] de?nition i objective data development this data sheet contains data from the objective speci?cation for product development. philips semiconductors reserves the right to change the speci?cation in any manner without notice. ii preliminary data quali?cation this data sheet contains data from the preliminary speci?cation. supplementary data will be published at a later date. philips semiconductors reserves the right to change the speci?cation without notice, in order to improve the design and supply the best possible product. iii product data production this data sheet contains data from the product speci?cation. philips semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. relevant changes will be communicated via a customer product/process change noti?cation (cpcn).
? koninklijke philips electronics n.v. 2005 all rights are reserved. reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. the information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. no liability will be accepted by the publisher for any consequence of its use. publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. date of release: 3 november 2005 document number: 74LVC2G74_1 published in the netherlands philips semiconductors 74LVC2G74 single d-type ?ip-?op with set and reset; positive edge trigger 22. contents 1 general description . . . . . . . . . . . . . . . . . . . . . . 1 2 features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 quick reference data . . . . . . . . . . . . . . . . . . . . . 2 4 ordering information . . . . . . . . . . . . . . . . . . . . . 2 5 marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 6 functional diagram . . . . . . . . . . . . . . . . . . . . . . 3 7 pinning information . . . . . . . . . . . . . . . . . . . . . . 4 7.1 pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 7.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 8 functional description . . . . . . . . . . . . . . . . . . . 4 8.1 function table . . . . . . . . . . . . . . . . . . . . . . . . . . 4 9 limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5 10 recommended operating conditions. . . . . . . . 5 11 static characteristics. . . . . . . . . . . . . . . . . . . . . 6 12 dynamic characteristics . . . . . . . . . . . . . . . . . . 8 13 waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 14 package outline . . . . . . . . . . . . . . . . . . . . . . . . 15 15 abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 18 16 revision history . . . . . . . . . . . . . . . . . . . . . . . . 18 17 data sheet status . . . . . . . . . . . . . . . . . . . . . . . 19 18 de?nitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 19 disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 20 trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 21 contact information . . . . . . . . . . . . . . . . . . . . 19

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